
PIC24FJ128GA010 FAMILY
DS39747F-page 12
2005-2012 Microchip Technology Inc.
CN18
32
40
50
I
ST
Interrupt-on-Change Inputs.
CN19
—
65
80
I
ST
CN20
—
37
47
I
ST
CN21
—
38
48
I
ST
CVREF
23
29
34
O
ANA
Comparator Voltage Reference Output.
EMUC1
15
19
24
I/O
ST
In-Circuit Emulator Clock Input/Output.
EMUD1
16
20
25
I/O
ST
In-Circuit Emulator Data Input/Output.
EMUC2
17
21
26
I/O
ST
In-Circuit Emulator Clock Input/Output.
EMUD2
18
22
27
I/O
ST
In-Circuit Emulator Data Input/Output.
ENVREG
57
71
86
I
ST
Enable for On-Chip Voltage Regulator.
IC1
42
54
68
I
ST
Input Capture Inputs.
IC2435569
I
ST
IC3445670
I
ST
IC4455771
I
ST
IC5526479
I
ST
INT0
35
45
55
I
ST
External Interrupt Inputs.
INT1
42
13
18
I
ST
INT2
43
14
19
I
ST
INT3
44
52
66
I
ST
INT4
45
53
67
I
ST
MCLR
7
9
13
I
ST
Master Clear (Device Reset) Input. This line is brought
low to cause a Reset.
OC1
46
58
72
O
—
Output Compare/PWM Outputs.
OC2
496176
O
—
OC3
506277
O
—
OC4
516378
O
—
OC5
526681
O
—
OCFA
17
21
26
I
ST
Output Compare Fault A Input.
OCFB
30
36
44
I
ST
Output Compare Fault B Input.
OSC1
39
49
63
I
ANA
Main Oscillator Input Connection.
OSC2
40
50
64
O
ANA
Main Oscillator Output Connection.
PGC1
15
19
24
I/O
ST
In-Circuit Debugger and ICSP Programming Clock.
PGD1
16
20
25
I/O
ST
In-Circuit Debugger and ICSP Programming Data.
PGC2
17
21
26
I/O
ST
In-Circuit Debugger and ICSP Programming Clock.
PGD2
18
22
27
I/O
ST
In-Circuit Debugger and ICSP Programming Data.
TABLE 1-2:
PIC24FJ128GA010 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
64-Pin
80-Pin
100-Pin
Legend:
TTL = TTL input buffer, ST = Schmitt Trigger input buffer, ANA = Analog level input/output, I2C = I2C/SMBus input buffer